Isilon Powering Innovation at Design Automation Conference

Are you headed to DAC (Design Automation Conference) in San Francisco this week? Dell EMC will be participating in the new Design Infrastructure Alley where our EDA specialists are looking forward to having one-on-one conversations about Isilon All-Flash solutions for EDA and AI.

The ecosystem required to support the demands of EDA has become more important with the growth of design sizes and complexity. Storage is a very critical element of this ecosystem with a requirement not just for high performance, but for massive scalability as well – some design projects can require over 1PB of storage!

Having spent the past 20 years in the EDA industry, I recognize that EDA tool flows depend critically on storage, and that not having the right infrastructure in place can result in slow turn-around times, reduced throughput, and even delayed time-to-market – ultimately leading to less revenue. During my tenure at Samsung, I architected and built a scalable, highly productive design environment that involved consolidating 4 data centers worldwide into a single on-premises cloud design infrastructure and resulted in significant savings in license and IT costs. While there I also participated in a joint project with Dell EMC and RTDA on the development of a storage-aware grid, with the objective of utilizing storage as an elastic resource in the same way we do cores, licenses and memory.  It’s an architecture that allows for maximized job throughput and lowest license costs. I’m very bullish on Isilon scale-out NAS as the platform that can deliver the scale and performance for today’s design environment and the future.

After a long career in the EDA industry, where in addition to Samsung I held senior engineering leadership positions at Inphi, Silicon Image, Synopsys, and Siemens, I recently joined Dell EMC as the CTO specializing in the EDA/Semiconductor industry for the Unstructured Data Solutions group.  At Dell EMC we are rallying around the value of data capital – that an organization’s data is the source of its wealth and competitive advantage.  For EDA, data is the business.  My new role is two-fold: spending time with customers to help you achieve your desired strategic outcomes, and what I learn from you back into our business to influence future architecture and design principles.  Some of the trends I’ve observed and plan to explore more include the role of object and cloud, how to incorporate deep learning to solve design quality and infrastructure problems, and examining the cost of design holistically.

I hope to see you at DAC 2018.  You can talk with me and other members of our EDA team in the Dell EMC booth (#1235), and don’t miss our breakout session, Peeling the Onion: How Enterprise Storage Limits Tool Performance and What You Need to Do to Fix It, on Wednesday at 10:30am.

About the Author: Balachandran Rajendran

Bala has been with Dell EMC since April 2018 as part of Global CTO office at Unstructured Data Solutions focused on Semiconductor and EDA vertical. Before Dell EMC, Bala worked at various organizations like Siemens, Synopsys , Silicon Image, Inphi and Samsung Research America in various roles leading and managing CAD tools, design flows, design methodology, IP management, infrastructure and IT. Design complexities are growing exponentially and so are the design flows and infrastructure needs-Bala believes that to solve the challenges facing semiconductor industry, the Design, CAD and IT teams need to work as an integrated and cohesive unit.